general description the max4696/MAX4697/max4698 low on-resistance (r on ), low-voltage analog switches operate from a sin- gle +2.0v to +5.5v supply. the max4696/MAX4697 are single-pole/single-throw (spst) analog switches, and the max4698 is a single-pole/double-throw (spdt) ana- log switch. the max4696 is a normally open (no) switch, and the MAX4697 is a normally closed (nc) switch. when powered from a 2.7v supply, these devices feature 35 ? (max) r on , with 2 ? (max) r on matching and 13 ? (max) flatness. the max4696/MAX4697/max4698 offer fast switching speeds (t on = 80ns max, t off = 25ns max). the max4698 offers a break-before-make function. the digital logic inputs are 1.8v logic compatible from a +2.7v to +3.3v supply and are ttl/cmos compatible from a +4.5v to +5.5v supply. the max4696/MAX4697/ max4698 are packaged in the chip-scale package (ucsp ), significantly reducing the required pc board area. the device occupies only a 1.50mm ? 1.02mm area. the 3 ? 2 array of solder bumps are spaced with a 0.5mm bump pitch. ________________________applications mp3 players battery-operated equipment relay replacement audio and video signal routing communications circuits pcmcia cards cellular phones hard drives modems features 6-bump, 0.5mm pitch, ucsp (package pending full qualification?xpected completion date 6/30/01. see ucsp reliability section for more details.) r on 35 ? max (+3v supply) 20 ? max (+5v supply) 2 ? max r on match between channels 13 ? max r on flatness over signal range low leakage currents over temperature 1na (max) at t a = +25? fast switching: t on = 80ns, t off = 25ns guaranteed break-before-make (max4698) +2.0v to +5.5v single-supply operation rail-to-rail signal handling low crosstalk: -75db (100khz) high off-isolation: -75db (100khz) 1.8v cmos logic compatible -3db bandwidth: >200mhz max4696/MAX4697/max4698 35 ? , low-voltage, spst/spdt analog switches in ucsp package ________________________________________________________________ maxim integrated products 1 in com gnd no v+ top view in nc gnd no com v+ max4698 in com gnd nc v+ MAX4697 max4696 in 0 1 no off on nc on off b3 com b1 a3 a2 a1 b2 b3 b1 a3 a2 a1 b2 com b3 b1 a3 a2 a1 b2 switches shown for logic "0" pin configurations/functional diagrams/truth table 19-1994; rev 2; 10/01 ordering information part temp. range pin/bump- package top mark max4696 ebt -40 c to +85 c 6 ucsp* aal MAX4697 ebt -40 c to +85 c 6 ucsp* aam max4698 ebt -40 c to +85 c 6 ucsp* aan rail-to-rail is a registered trademark of nippon motorola, ltd. ucsp is a trademark of maxim integrated products, inc. * note: requires special solder temperature profile described in the absolute maximum ratings section. * ucsp reliabilty is integrally linked to the user? assembly meth- ods, circuit board material, and environment. refer to the ucsp reliability section of this data sheet for more infromation. for pricing, delivery, and ordering information, please contact maxim/dallas direct! at 1-888-629-4642, or visit maxim? website at www.maxim-ic.com.
max4696/MAX4697/max4698 35 ? , low-voltage, spst/spdt analog switches in ucsp package 2 _______________________________________________________________________________________ absolute maximum ratings electrical characteristics single +3v supply (v+ = +2.7v to +3.3v, v ih = +1.4v, v il = 0.5v, t a = t min to t max , unless otherwise noted. typical values are at +3v and t a = +25 c.) (notes 3, 9) stresses beyond those listed under ?bsolute maximum ratings?may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specificatio ns is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. all voltages referenced to gnd v+, in .......................................................................-0.3v to +6v com, no, nc (note 1).................................-0.3v to (v+ + 0.3v) continuous current com, no, nc ..................................20ma peak current com, no, nc (pulsed at 1ms, 10% duty cycle) .................................40ma continuous power dissipation (t a = +70 c) 3 ? 2 ucsp (derate 10.1mw/ c at +70 c)....................808mw operating temperature range ...........................-40 c to +85 c storage temperature range .............................-65 c to +150 c bump temperature (soldering) (note 2) infrared (15s) ................................................................+220 c vapor phase (60s) ........................................................+215 c parameter symbol conditions t a min typ max u n i t s analog switch analog signal range v com , v no , v nc t min to t max 0v+v +25 c3035 on-resistance r on v+ = +2.7v, i com = 1ma, v no or v nc = 1.5v t min to t max 40 ? +25 c12 on-resistance match between channels (max4698 only) (note 5) ? r on v+ = +2.7v, i com = 1ma, v no or v nc = 1.5v t min to t max 3 ? +25 c1013 on-resistance flatness (note 6) r flat ( on ) v+ = +2.7v, i com = 1ma, v no or v nc = 1v, 1.5v, 2v t min to t max 15 ? +25 c-0.5 0.01 0.5 no, nc off-leakage current (note 4) i no(off) , i nc ( off ) v+ = +3.6v; v com = 0.3v, 3.3v; v no or v nc = 3.3v, 0.3v t min to t max -1 1 na +25 c-0.5 0.01 0.5 com off-leakage current (note 4) (max4696, MAX4697 only) i com_ ( off ) v+ = +3.6v; v com = 0.3v, 3.3v; v no or v nc = 0.3v, 3.3v t min to t max -1 1 na +25 c-0.5 0.01 0.5 com on-leakage current (note 4) i com_ ( on ) v+ = +3.6v; v com = 0.3v, 3.3v; v no or v nc = 0.3v, 3.3v, or floating t min to t max -2 2 na dynamic characteristics +25 c5080 turn-on time (note 4) t on v+ = +2.7v; v no , v nc = 1.5v, r l = 300 ? , c l = 35pf, fi g ure 1 t min to t max 110 ns note 1: signals on no, nc, and com exceeding v+ are clamped by an internal diode. limit forward-diode current to maximum cur- rent rating. note 2: this device is constructed using a unique set of packaging techniques that impose a limit on the thermal profile the device can be exposed to during board level solder attach and rework. this limit permits only the use of the solder profiles recom- mended in the industry standard specification, jedec 020a, paragraph 7.6, table 3 for ir/vpr and convection reflow. preheating is required. hand or wave soldering is not allowed.
max4696/MAX4697/max4698 35 ? , low-voltage, spst/spdt analog switches in ucsp package _______________________________________________________________________________________ 3 parameter symbol conditions t a min typ max units +25 c2025 turn-off time (note 4) t off v+ = +2.7v; v no , v nc = 1.5v, r l = 300 ? , c l = 35pf, figure 1 t min to t max 40 ns +25 c15 break-before-make time (max4698 only) (note 4) t bbm v+ = +3.3v; v no , v nc = 1.5v, figure 2 t min to t max 2 ns charge injection q v gen = 0, r gen = 0, c l = 1.0nf, figure 3 +25 c8pc on-channel -3db bandwidth bw signal = 0dbm, 50 ? in and out, figure 4 +25 c 200 mhz off-isolation (note 7) v iso f = 100khz, r l = 50 ? , c l = 5pf, figure 4 +25 c -75 db crosstalk (max4698 only) (note 8) v ct f = 100khz, r l = 50 ? , c l = 5pf, figure 4 +25 c -75 db total harmonic distortion thd f = 20hz to 20khz, 2vp-p, r l = 600 ? +25 c 0.014 % no, nc off-capacitance c no ( off ) , c nc ( off ) f = 1mhz, figure 5 +25 c15pf com off-capacitance c com ( off ) f = 1mhz, figure 5 +25 c15pf switch on-capacitance c (on) f = 1mhz, figure 6 +25 c30pf digital i/o input logic high v ih t min to t max 1.4 v input logic low v il t min to t max 0.5 v input leakage current i in v in = 0 or v+ t min to t max -1 1 a power supply power-supply range v+ t min to t max 2.0 5.5 v supply current i+ v+ = +3.3v, v in = 0 or v+ t min to t max 1 a electrical characteristics single +3v supply (continued) (v+ = +2.7v to +3.3v, v ih = +1.4v, v il = 0.5v, t a = t min to t max , unless otherwise noted. typical values are at +3v and t a = +25 c.) (notes 3, 9) electrical characteristics single +5v supply (v+ = +4.5v to +5.5v, v ih = +2.4v, v il = 0.8v, t a = t min to t max , unless otherwise noted. typical values are at +5v and t a = +25 c.) (notes 3, 9) parameter symbol conditions t a min typ max u n i t s analog switch analog signal range v com , v no , v nc 0v+v +25 c1520 on-resistance r on v+ = +4.5v, i com = 1ma, v no or v nc = 1v, 3.5v t min to t max 25 ? +25 c13 on-resistance match (max4698 only) (note 5) ? r on v+ = 4.5v, i com = 1ma, v no or v nc = 1v, 3.5v t min to t max 4 ?
max4696/MAX4697/max4698 35 ? , low-voltage, spst/spdt analog switches in ucsp package 4 _______________________________________________________________________________________ note 3: the algebraic convention, where the most negative value is a minimum and the most positive value a maximum, is used in this data sheet. note 4: guaranteed by design. note 5: ? r on = r on(max ) - r on(min) , between switches. note 6: flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the specified analog signal ranges. note 7: off-isolation = 20log 10 (v com / v no ), v com = output, v no = input to off switch. note 8: between switches. note 9: ucsp parts are 100% tested at +25 c only, and guaranteed by correlation at the full-rated temperature. electrical characteristics single +5v supply (continued) (v+ = +4.5v to +5.5v, v ih = +2.4v, v il = 0.8v, t a = t min to t max , unless otherwise noted. typical values are at +5v and t a = 25 c.) (notes 3,9) parameter symbol conditions t a min typ max u n i t s +25 c34 on-resistance flatness (note 6) r flat ( on ) v+ = +4.5v, i com = 1ma, v no or v nc = 1v, 2.25v, 3.5v t min to t max 5 ? +25 c-0.5 0.01 0.5 no, nc off-leakage current (note 4) i no(off) , i nc ( off ) v+ = +5.5v; v com = 1v, 4.5v; v no or v nc = 4.5v, 1v t min to t max -1 1 na +25 c-0.5 0.01 0.5 com off-leakage current (max4696, MAX4697 only) (note 4) i com_ ( off ) v+ = +5.5v; v com = 1v, 4.5v; v no or v nc = 4.5v, 1v t min to t max -1 1 na +25 c-0.5 0.01 0.5 com on-leakage current (note 4) i com_ ( on ) v+ = +5.5v; v com = 1v, 4.5v; v no or v nc = 1v, 4.5v, or floating t min to t max -2 2 na +25 c3040 turn-on time (note 4) t on v+ = +5.5v, v no , v nc = 3v, r l = 300 ? , c l = 35pf, figure 1 t min to t max 50 ns +25 c1520 turn-off time (note 4) t off v+ = +5.5v, v no , v nc = 3v, r l = 300 ? , c l = 35pf, figure 1 t min to t max 25 ns +25 c9 break-before-make time (max4698 only) (note 4) t bbm v+ = +5.5v, v no , v nc = 3v, r l = 300 ? , c l = 35pf, figure 2 t min to t max 2 ns digital i/o input logic high v ih 2.4 v input logic low v il 0.8 v input leakage current i in v in = 0 or v+ -1 1 a supply power-supply range v+ 2.0 5.5 v supply current i+ v+ = +5.5v, v in = 0 or v+ 1 a
max4696/MAX4697/max4698 35 ? , low-voltage, spst/spdt analog switches in ucsp package _______________________________________________________________________________________ 5 0 30 20 10 40 50 60 02.0 1.5 0.5 1.0 2.5 3.0 3.5 4.0 4.5 5.0 on-resistance vs. v com max4696/7/8 toc01 v com (v) r on ( ? ) v+ = +2v v+ = +2.7v v+ = +3.3v v+ = +5v 0 10 5 20 15 25 30 0 1.0 1.5 0.5 2.0 2.5 3.0 on-resistance vs. v com (v+ = +3v) max4696/7/8 toc02 v com (v) r on ( ? ) t a = +85 c t a = +25 c t a = -40 c typical operating characteristics (t a = +25 c, unless otherwise noted.) 0 4 2 8 6 10 12 16 14 18 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 on-resistance vs. v com (v+ = +5v) max4696/7/8 toc03 v com (v) r on ( ? ) t a = +85 c t a = +25 c t a = -40 c 0.1 1 10 100 1000 on/off-leakage current vs. temperature max 4696/7/8 toc04 temperature ( c) on/off-leakage currents (pa) -40 20 40 -20 0 60 80 on-leakage off-leakage 0 15 10 5 20 25 30 0 2.0 1.5 0.5 1.0 2.5 3.0 3.5 4.0 4.5 5.0 charge injection vs. v com max4696/7/8 toc05 v com (v) charge injection (pc) v+ = +3v v+ = +5v 0 20 10 40 30 60 50 70 1.5 3.5 2.5 4.5 5.5 turn-on/off time vs. supply voltage max4696/7/8 toc06 v+ (v) t on/off (ns) t on t off turn-on/off time vs. temperature max4696/7/8 toc07 0 10 30 20 60 70 50 40 80 t on/off (ns) -40 0 20 -20 40 60 80 temperature ( c) t on v+ = +3v t on v+ = +5v t off v+ = +3v t off v+ = +5v 20 35 30 25 40 45 50 55 60 65 70 02 1 3456 supply current vs. supply voltage max4696/7/8 toc08 supply voltage (v) supply current (pa) v in = gnd 0 0.2 0.6 0.4 1.0 1.2 0.8 1.4 1.5 2.5 3.0 2.0 3.5 4.0 4.5 5.0 5.5 logic threshold voltage vs. supply voltage max4696/7/8 toc09 v+ (v) logic threshold voltage (v) v in rising v in falling
max4696/MAX4697/max4698 35 ? , low-voltage, spst/spdt analog switches in ucsp package 6 _______________________________________________________________________________________ applications information logic inputs where the max4696/MAX4697/max4698 have a +3.3v supply, in may be driven low to gnd and driven high to 5.5v. driving in rail-to-rail minimizes power con- sumption. logic inputs accept up to +5.5v regardless of supply voltage. analog signal levels analog signals that range over the entire supply volt- age (gnd to v+) are passed with very little change in r on (see typical operating characteristics ). the switches are bidirectional, so the no, nc, and com terminals are both inputs or outputs. power-supply sequencing and overvoltage protection caution: do not exceed the absolute maximum ratings because stresses beyond the listed ratings may cause permanent damage to devices. proper power-supply sequencing is recommended for all cmos devices. always apply v+ before applying analog signals, especially if the analog signal is not current limited. if this sequencing is not possible, and if the analog inputs are not current limited to <20ma, add a small-signal diode (d1) as shown in figure 6. adding a protection diode reduces the analog range to a diode drop (about 0.7v) below v+ (for d1). r on increases slightly at low supply voltages. maximum supply volt- age (v+) must not exceed +6v. protection diode d1 also protects against some overvoltage situations. no pin/bump description pin/bump max4696 MAX4697 max4698 name function b1 b1 b1 v+ positive supply voltage input b2 b2 b2 in digital control input b3 b3 b3 gnd ground a1 a3 nc analog switch, normally closed terminal a2, a3 a2, a3 a2 com analog switch, common terminal a1 a1 no analog switch, normally open terminal typical operating characteristics (continued) (t a = +25 c, unless otherwise noted.) frequency response frequency (hz) 10k 10m 100m 100k 1m 1g loss (db) 20 -120 -100 -80 -60 -40 0 -20 max4696/7/8 toc10 on-loss off-isolation 0.1 0.001 10 10k 100k total harmonic distortion vs. frequency 0.01 max4696/7/8 toc11 frequency (hz) thd (%) 100 1k r l = 600 ? v+ = +5v v com = 2v p-p f = 20khz
max4696/MAX4697/max4698 35 ? , low-voltage, spst/spdt analog switches in ucsp package _______________________________________________________________________________________ 7 damage will result on the circuit in figure 6 if the supply voltage is below the absolute maximum rating and if a fault voltage up to the absolute maximum rating is applied to an analog signal terminal. ucsp package consideration for general ucsp package information and pc layout considerations, please refer to the maxim application note wafer-level ultra-chip-scale packages . ucsp reliability the chip-scale package (ucsp) represents a unique package that greatly reduces board space compared to other packages. ucsp reliability is integrally linked to the user s assembly methods, circuit board material, and usage environment. the user should closely review these areas when considering a ucsp. performance through operating life test and moisture resistance is equal to conventional package technology as it is primarily deter- mined by the wafer-fabrication process. however, this form factor may not perform equally to a packaged prod- uct through traditional mechanical reliability tests. mechanical stress performance is a greater considera- tion for a ucsp. ucsp solder joint contact integrity must be considered since the package is attached through direct solder contact to the user s pc board. testing done to characterize the ucsp reliability per- formance shows that it is capable of performing reli- ably through environmental stresses. results of environmental stress tests and additional usage data and recommendations are detailed in the ucsp appli- cation note, which can be found on maxim s website, at www.maxim-ic.com. test circuits/timing diagrams t r < 5ns t f < 5ns 50% v il logic input r l 300 ? com in c l includes fixture and stray capacitance. v out = v n_ ( r l ) r l + r on v in v ih t off 0 no or nc 0.9 v 0ut 0.9 v out t on v out switch output logic input logic input waveforms inverted for switches that have the opposite logic sense. v+ c l 35pf v+ v out max4696 MAX4697 max4698 gnd 50% v ih v il logic input v out 0.9 v out t d logic input r l 300 ? gnd c l includes fixture and stray capacitance. no in nc v out v+ v+ c l 35pf v n_ com max4698 t r < 5ns t f < 5ns figure 1. switching time figure 2. break-before-make interval (max4698 only)
max4696/MAX4697/max4698 35 ? , low-voltage, spst/spdt analog switches in ucsp package 8 _______________________________________________________________________________________ measurements are standardized against shorts at ic terminals. off-isolation is measured between com and "off" no or nc terminal on each switch. on-loss is measured between com and "on" no or nc terminal on each switch. crosstalk is measured from one channel to all other channels. signal direction through switch is reversed; worst values are recorded. v+ v out v+ in nc com no v in max4696 MAX4697 max4698 off-isolation = 20log v out v in on-loss = 20log v out v in crosstalk = 20log v out v in network analyzer 50 ? 50 ? 50 ? 50 ? meas ref 10nf 0 or v+ 50 ? gnd test circuits/timing diagrams (continued) figure 4. off-isolation/on-channel bandwidth, crosstalk chip information transistor count: 50 capacitance meter nc or no com gnd in v il or v ih 10nf v+ f = 1mhz v+ max4696 MAX4697 max4698 figure 5. channel off/on-capacitance figure 6. overvoltage protection using external blocking diodes positive supply com no d1 gnd v g v+ max4696 MAX4697 max4698 v gen gnd com c l v out v+ v out in off on off ? v out q = ( ? v out )(c l ) nc or no in depends on switch configuration; input polarity determined by sense of switch. off on off in v il to v ih v+ r gen in max4696 MAX4697 max4698 1nf figure 3. charge injection
max4696/MAX4697/max4698 35 ? , low-voltage, spst/spdt analog switches in ucsp package maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a maxim product. no circu it patent licenses are implied. maxim reserves the right to change the circuitry and specifications without notice at any time. maxim integrated products, 120 san gabriel drive, sunnyvale, ca 94086 408-737-7600 _____________________ 9 ? 2001 maxim integrated products printed usa is a registered trademark of maxim integrated products. 6l, ucsp.eps.eps package information
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